1. Technical Field
Embodiments of the present invention generally relate to an integrated circuit, and more particularly, in one or more embodiments, to a system having a plurality of memories.
2. Related Art
In an electronic system where a memory controller controls a memory chip, they can communicate through a signal transmission line. In order to meet demands of high-performance electronic system, some communication standards, which may apply to the communication between the memory and the memory controller, require high data rates and low signal swings. At the low signal swings, however, even a relatively small amount of external noise or impedance mismatching in the signal transmission line between the memory chip and the memory controller may cause signal distortion.
On-die termination (ODT) is the technology where resistors for impedance matching in such a transmission line are located inside a semiconductor chip instead of on somewhere outside the semiconductor chip. The ODT technology may also apply to the memory chip.
In addition, in a situation where impedance values need to be calibrated over process, voltage, and temperature (PVT) variation, ZQ calibration technology may be used. For example, a memory chip may be coupled to external reference resistors, and ZQ calibration can be carried out by using the external reference resistors.